We all know that the stack arrangement of the circuit board is the basis of the entire system design of the PCB. If the laminated design is defective, it will eventually affect the emc performance of the whole machine. So let's take a look at how to understand the stacked file with us~
The following figure is an illustration of the stacked files that we generally see:
1. The analysis of (Figure 1) is as follows:
First of all, we can see that the stack is an 8-layer board, with 5 wiring layers (TOP, ART03, ART04, ART06, BOTTOM), 2 ground layers (GND02, GND05), and 1 power layer (PWR07).
Secondly, we can get the PP sheet used in the whole board, GND02-ART03 a core board (core), ART4-GND05 (core) a core board, ART06-PWR07 (core) a core board, and others use PP It is made by adding copper foil and finally pressing together. The PP sheet in the middle of the TOP and GND02 layers is a 2116 prepreg. The PP sheet in the middle of the ART03 and ART04 layers is made of two 3313 prepregs and one 7628 prepreg. The PP sheet in the middle of the GND05 and ART06 layers is made of two 3313 prepregs. It is laminated with a 7628 prepreg. The PP sheet between the PWR07 and BOTTOM layers is 2116 prepreg.
Finally, it can be seen that the entire plate thickness is 1.6mm (10% tolerance is allowed during production). The board thickness calculation is as follows:
Thickness of secondary outer layer 2116:
Measured thickness=theoretical thickness—copper thickness*(1—residual copper rate)
=0.1174*39.3701mil—1.25* (1—65%)
=4.1845mil
Inner layer 3313*2+7628 thickness:
Measured thickness=theoretical thickness—copper thickness 1*(1—residual copper rate 1)—copper thickness 2*(1—residual copper rate 2)
=(0.0987*2+0.1933)*39.3701mil—1.25*(1—65%)—1.25*(1—15%)
=13.8819mil
Theoretical thickness:
Board thickness = inner and outer copper thickness + PP sheet thickness + core board thickness
=0.7087*2+1.25*6+4.1845*2+13.8819*2+5.1*3
=60.3502mil
=1.5329mm
Second, let's follow the laminated file Figure 2
From (Figure 2), we can know the trace width and reference layer of the single-ended 50R impedance of each trace layer. The trace width of the TOP and BOTTOM layers is 6 mil, the TOP layer refers to the GND02 layer, and the BOTTOM layer refers to the PWR07 layer; the trace width of the ART03 and ART04 layers is 5.7 mil, the ART03 layer refers to the GND02 layer, and the ART04 refers to the GND05 layer; the ART06 layer trace width is 5.4mil, ART06 refers to GND05 and PWR07 layers. The specific value can be calculated from Polar SI software.
(1) Surface layer single-ended (TOP, BOTTOM): line width 6mil; =51.51*0.9+3.2=49.56
(2) Inner single-ended (ART03, ART04): line width 5.7mil; =50.13
(3) Inner single-ended (ART06): line width 5.4mil; =50.08
Now, next to the stacked file, Figure 3-3. From (Figure 3), we can know the trace width, the gap between the traces and the reference layer of the differential 100R impedance of each trace layer. The trace width of the TOP and BOTTOM layers is 4.5mil, the line-to-line gap is 8mil, the TOP layer refers to the GND02 layer, and the BOTTOM layer refers to the PWR07 layer; the trace width of the ART03 and ART04 layers is 4.1mil, the line-to-line gap is 8.2mil, and the ART03 layer refers to GND02 layer, ART04 refers to GND05 layer; ART06 layer trace width is 4.1mil, line-to-line gap is 8.2mil, ART06 refers to GND05, PWR07 layer. The specific value can be calculated from Polar SI software. (1) Surface layer difference (TOP, BOTTOM): line width/line spacing 4.5/8mil; =107.26*0.9+3.2=99.734
(2) Inner layer difference (ART3/ART4 layer): line width/line spacing 4.1/8.2mil; =99.27
(3) Inner layer difference (ART6 layer): line width/line spacing 4.1/8.2mil; =98.58
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