# Summary of the principle analysis of linear power supply (LDO)

Linear power supply (LDO)

The basic circuit of the low dropout linear regulator (LDO) is shown below. This circuit consists of a series regulator VT, sampling resistors R1 and R2, and a comparison amplifier A.

The understanding of this: the Zener diode provides a stable reference voltage Uref for the opposite end of the op amp, and the output provides the voltage of the non-inverting terminal of the op amp through the voltage divider of R2. When the output voltage is too high, the voltage value of the non-inverting terminal is greater than the reference of the opposite end, and the output is positive, so the triode is turned off and Uout is lowered. When the output voltage Uout is too low, the voltage value of the non-inverting terminal is smaller than the reference of the opposite end, and the output is negative, so the transistor is turned on and Uout rises. Therefore, the voltage regulator circuit constantly adjusts the output voltage through this mechanism to keep it stable.

The sampling voltage is applied to the non-inverting input terminal of the comparator A, and compared with the reference voltage Uref applied to the inverting input terminal, the difference between the two is amplified by the amplifier A, and the voltage drop of the series regulating tube is controlled to stabilize the output voltage. When the output voltage Uout decreases, the difference between the reference voltage and the sampling voltage increases, the drive current of the comparison amplifier output increases, and the series regulator tube voltage drop decreases, thereby increasing the output voltage. Conversely, if the output voltage Uout exceeds the desired set value, the pre-drive current of the comparator output is reduced, thereby reducing the output voltage.

The negative terminal of the op amp provides a stable voltage, and the positive terminal of the op amp is divided by the resistor network through the output voltage. However, when the output voltage is high, the positive terminal voltage of the op amp is also high, which is larger than the negative terminal value. The output of the op amp is positive, the MOS transistor is turned off, and the OUT output is lowered. When the output voltage is low, the positive terminal voltage of the op amp is also low. The terminal value is small, the output of the op amp is negative, the MOS transistor is turned on, and the OUT output is raised. The regulator chip is constantly adjusting the output voltage through this mechanism to make it stable.

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