Summary
This system is based on STM32F407, mainly using FIFO for cache. The high-speed signal is first sampled by AD, and then the sampled data is first buffered and processed by the FIFO, and then Blackman pre-processed by STM32F407, and then 1024-point FFT is used for spectrum analysis, and finally the data is displayed on the LCD 12864 for the purpose of performing Human-computer interaction! The system can realize the spectrum display of arbitrary waveform signals, and can automatically find the amplitude, frequency and phase of each harmonic component and perform 8-bit effective data display.
System design task
First, the taskDesign and build a high speed spectrum analyzer.
1 system planThe system consists of a pre-matching amplifying circuit, an AD sampling circuit, a high-speed FIFO buffer circuit, and a liquid crystal display circuit. Among them, the high-speed data buffer circuit and the high-precision display data are the difficulties of this design! The choice of these modules is demonstrated separately below. Â Â Â Â Â Â Â Â Â
1.1 Demonstration and selection of measurement methods1.1.1 Comparison and selection of MCU processors
DSP processing is mainly to consider the speed of operation.
8-bit, 16-bit or 32-bit MCUs can usually be used in the selection of the processor, but since the fast Fourier FFT algorithm is usually encountered in the process of processing signals, a large number of floating-point operations are encountered. Moreover, a floating point number occupies four bytes, so it takes a lot of memory in the process of processing, and the floating point operation speed is relatively slow, so it is difficult to complete the ordinary MCU in a certain time, so comprehensively consider the operation speed and memory size. And other factors.
The system uses 32-bit STM32F407 as the core DSP processing device. The chip has 1MB of flash memory space, 196KB of SRAM space, and the clock frequency reaches 168MHz. When the program runs at 168MHz, it uses the Flash fetch instruction (not the internal SRAM) to get 210DMIPS through the Dhrysone test. It mainly uses the ART accelerator, which can eliminate the slower Flash memory and limit the performance of the MCU. This can make the CPU can Run the program from Flash in a nearly zero wait mode at all operating frequencies. There is also a hardware FPU processing unit with STM32F407, which can implement floating-point operations without software algorithms, and directly implements floating-point operations using hardware. This reduces the amount of code generated by the compiler and is more convenient to use, floating point numbers. The data range that can be represented by only taking four bytes is large, so don't worry about the data overflow after calculation! Further increase the speed of the operation.
1.1.2 Comparison and selection of sampling methods
In the first scheme, a square wave signal with high frequency stability and high precision is generated as a clock signal by the DDS integrated chip.
The AD9851 is a direct digital frequency synthesis (DDS) chip. The AD9851 is a high-performance device manufactured by Analog Devices. It can communicate serially or in parallel with a single-chip microcomputer through a simple interface. The conversion between the external input frequency control word and the internal frequency phase control word of the chip can be completed, the output frequency can be adjusted very easily by the frequency control word, and the phase of the output signal can be accurately adjusted, and the output signal amplitude is stable, but due to DDS control It also needs to occupy a part of the MCU's IO port resources, and the cost of DDS is a bit high.
In the second scheme, the PWM wave is directly generated by the MCU as a sampling clock signal.
The PWM wave generated directly by the STM32F407 can realize a square wave with adjustable frequency and duty cycle. The fastest IO port flip speed can reach 84MHz, and the desired sampling frequency can be easily achieved. Since the output voltage is a voltage of 3.3V, it is connected to the peripheral chip and needs to be converted into 5V by the level conversion chip to be used as the clock signal of the peripheral chip.
The scheme three sampling clock signal is provided by LTC1799 produced by Linear.
The LTC1799 is a precision oscillator that is easy to use. It operates from a single 2.7V to 5.5V supply and provides a rail-to-rail, 50% duty cycle square wave output. The CMOS output driver ensures fast rise/fall times and rail-to-rail switching operation. The frequency setting is adjusted by a resistor, and the resistance value varies within a range to select any one of frequencies between 100 kHz and 33 MHz. The tri-state DIV input is responsible for dividing the master clock by 1, 10 or 100 before determining the drive output.
In combination with the above scheme, option 3 is selected to use a LTC1799 to generate a 15 MHz sampling clock signal.
1.1.3 Argument and selection of AD sampling chip
In the first scheme, the sampling signal is sampled by the MCU internal ADC.
The maximum internal conversion rate of STM32F407 is 7.2MSPS, and the amplitude of the sampled signal can only be between 0V and 3.3V. It can measure the dynamic range and it is difficult to meet the requirements.
Option 2 uses TI's 8-bit TLC5510A as the AD sampling chip.
The TLC5510A is an 8-bit AD conversion chip with high-speed CMOS technology and a maximum conversion rate of 20MSPS. Supports +5V power supply, internal sample-and-hold circuit, high-impedance output, and internal reference resistor. The output data is valid on the falling edge of the clock, and the data pipeline structure results in a delay of 2.5 clocks. Moreover, the high-speed AD is generally more expensive. In the dynamic range of the input signal above 2V, the high-speed AD chip that TI can apply for is only TLC5510A.
Combine the above schemes, select scheme 2, and use TLC5510A as a high-speed sampling chip when the accuracy requirements are not high.
1.1.4 Demonstration and selection of high-speed data cache chip
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