Development of EDSL Modem Based on SOPC

Development of EDSL Modem Based on SOPC

1 Introduction

At present, xDSL broadband access technology makes full use of existing twisted pair resources to provide users with asymmetric high-speed channels, especially ADSL technology has been widely accepted by people as the mainstream of broadband access technology. However, with the maturity and development of IP switching technology, the switching mode in the backbone network will be gradually changed from ATM to IP switching mode, so ADSL technology based on ATM is increasingly showing its own limitations. Based on this, the Ministry of Information Industry of China proposed the EDSL technology based on the IP switching network in January 2003, which is called the TDD based Ethernet Digital Subscriber Line System (TDD-EDSL) based on time division duplex. Combining the essence of the two widely used communication technologies xDSL and Ethernet, for the first time, the direct transmission of IP packets within the access network is realized without ATM signaling conversion in the middle; data burst technology is adopted and Ethernet collision detection is applied Mechanism, dynamic bandwidth allocation, rate up to 10Mbit / s, the second generation EDSL technology can achieve intelligent spectrum management, the highest rate can reach 100Mbit / s; TDD-EDSL realizes IP end-to-end transmission, long transmission distance, standard distance can reach 8km , Up to 9km when the loop quality is good; high transmission efficiency, low power consumption; perfect network management system, flow control and service quality control; fully comply with IEEE802.3 Ethernet, YD / T1254-2003 and ANSI TI 417 spectrum management standards ; Easy installation, plug and play at the user end, using 10/100 / 1000Mbit / s Ethernet interface.

The unique intelligent spectrum management technology and time-division duplex mode greatly simplify the system structure, and also conform to the trend of backbone network IP. Compared with the traditional xDSL technology, it not only overcomes many limitations of the xDSL technology (such as picking up lines, crosstalk, etc.), but also increases the transmission distance and improves the transmission efficiency. The EDSL system structure is similar to ADSL, and its core part is EDSL Modem.

In the implementation of EDSL, this paper proposes a method that combines the real-time operating system µC / OS-II [1] that can deprive the real-time kernel and the 32-bit reduced instruction set soft-core processor Nios core to form a configurable soft core Embedded development platform for processors. The software and hardware of the platform can be tailored according to user needs, which provides maximum flexibility in system design and has important application value. This article focuses on the realization of SODSL-based EDSL Modem.

2 EDSL system structure and protocol stack

The main technical features of EDSL: (1) IP end-to-end network; (2) time-division multiplexing technology, two-way dynamic bandwidth allocation; (3) customer server mode, IP packet collision-free mechanism; (4) data burst technology. Because of the adoption of the above technologies, EDSL technology not only overcomes many limitations of xDSL technology, but also increases the transmission distance and improves the transmission efficiency. The system structure of EDSL is similar to that of ADSL, which is composed of EDSL Modem at the user end and DSLAM (DSL Access MulTIplexer), a high-density access multiplexing device at the office end.

EDSL system structure and protocol stack

EDSL technology is a new broadband access technology based on IP switching. It combines the advantages of Ethernet technology and xDSL technology. In order to fully reduce the complexity of user equipment and make the system easy to manage uniformly, the system uses a client server model, that is The user end works in the client mode, and the central office equipment is in the server mode. The central office equipment performs line spectrum management and rate adaptive debugging to obtain parameters such as the maximum rate and the best modulation frequency that the twisted pair can currently withstand. When the EDSL device at the user end receives an information frame containing such information, it changes its own parameters according to the received parameters, so as to achieve the best working state. In this mode, it is easy to use without user setting, which greatly enhances the user's ease of use.

Compared with ADSL technology based on ATM, EDSL technology has a simpler protocol structure [3]. As shown in Figure 2.

3 Design of the hardware platform

The construction of EDSL Modem hardware platform mainly uses Altera's FPGA Cyclone EP1C6Q240C8 chip, which has sufficient programmable logic resources to embed a 32-bit Nios-II soft core processor to implement the entire programmable embedded system. The main function of the system is realized by FPGA, and the hardware circuit only needs to add a storage device, an Ethernet control chip and a front-end AD / DA conversion chip in addition to the FPGA. This system mainly uses a piece of 8M Byte Flash, a piece of 16M Byte SDRAM, and Ethernet interface control chip as peripheral devices of FPGA. The hardware structure is simple and clear, which greatly improves the reliability of the system. The operating clock of the FPGA system is 50MHz, which fully guarantees the operating speed of the system.

Altera's Quartus-II and SOPC Builder software are mainly used in the construction of the hardware platform. Among them, Quartus-II can design, input, compile, simulate, synthesize, place and route the system and various logical components, and perform bit stream file Download and configuration file burning, and use on-chip logic analyzer for analysis and verification. SOPC Builder is embedded in the Quartus-II development system. It is an automatic system development tool that can automatically define the system and complete the integration process of SOPC development. Select the required components of the system in SOPC Builder, and automatically generate system-level HDL files for each component and the software required to support the components, such as drivers, library files, and some practical applications, for software development prototypes. [ 4].

The 32-bit Nios-II soft core processor and basic Nios-II peripheral modules such as UART controller, timer, FLASH controller, SDRAM controller, etc. can be customized through the SOPC Builder software package. The hardware platform structure designed in this paper is shown in Figure 3.

The hardware part in the dotted frame is implemented in the FPGA

The hardware parts in the dotted frame shown in Figure 3 are all implemented in FPGA

The embedded processor Nios-II of this system is a user-configurable 16-bit or 32-bit reduced instruction set soft core processor introduced by Altera Corporation. The Nios-II processor can be configured to support up to 64 interrupts, including external hardware interrupts, internal interrupts, and TRAP (debug interrupts). The Nios-II processor can be configured to use a 32-bit internal timer, which is controlled by software and written to the control register to obtain regular work. It works the same as a general timer and can generate a regular interrupt.

The Nio-II embedded system uses the Avalon switched bus to realize network connection between the processor, peripheral devices and interface circuits, and provides high-bandwidth data paths, multiplexing and real-time processing capabilities. Avalon switched bus can be automatically generated by calling SOPC Builder design software [5].

The core part of the EDSL Modem, the main transceiver, uses the logic unit in the FPGA to write a custom user module and generate a custom IP core, which is connected to the embedded processor through the Avalon bus interface. The main transceiver includes two parts: EDSL framing module and QAM modulation module.

In the SOPC system, in addition to the above components, there are on-chip ROM, internal timer, UART serial port, SRAM, Flash, and Ethernet controller LAN91c111 interface and other system components are automatically generated by SOPC builer.

4 Design of software system

The development of the software platform is carried out on Altera's Nios-II IDE system customized for Nios-II system. Nios-II IDE is an integrated development environment based on Eclipse IDE, users can develop Nios II system in Nios-II IDE Module drivers, board support packages (BSP), and user applications. Considering the system control and high-speed data transmission of the EDSL Modem, a real-time embedded system uC / OS-II is embedded in the embedded platform. The software architecture of the entire system is shown in Figure 4:

Software Architecture

Among them, the Nis-II hardware platform is the driver of each component of EDSL Modem. Above it is the hardware abstraction layer (HAL), which is a system library (System Library) located between the application program and the system hardware. You can use these system libraries to communicate with the underlying hardware very conveniently during software development without concern. Implementation details of the underlying hardware. In this way, an obvious boundary is formed between the upper-layer application program and the underlying hardware, and the modification of the underlying driver will not cause any impact on the application program. The HAL API (ApplicaTIon Program InteRFace, application program interface) integrates the ANSIC standard library, which allows applications to access hardware and files using C library-like functions.

The real-time embedded operating system uC / OS-II kernel works on top of HAL [6]. With the HAL layer, uC / OS-II-based programs have better portability and are not subject to change by the underlying hardware. influences.

In addition, EDSL Modem's Ethernet interface communication mainly embeds LwIP protocol in uC / OS-II. LwIP not only supports general network protocols, such as UDP protocol, DHCP protocol, PPP protocol, etc., but also supports multiple network interfaces, IPv6 and standard API [7].

5 Conclusion

This article introduces TDD-EDSL, a broadband access technology with independent intellectual property rights in China, and focuses on the hardware and software implementation of SODSL-based EDSL Modem. In the case of imperfect commercial ASICs, this article uses a Nios-II embedded system with both software and hardware programmable, which shortens the R & D cycle and reduces R & D costs. At the same time, SOPC also represents the future development direction of product design and has a positive reference significance. Each part of the EDSL Modem designed in this paper has been verified by software simulation and experiment box development platform.

6 Innovation

The application of Nios-II embedded system with programmable hardware and software to the research and development of related products in the broadband field has greatly shortened the R & D cost and R & D cycle of the product, and avoided over-reliance on mature ASICs during the R & D process.

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