Radio Frequency Identification (RFID) is a non-contact automatic identification technology that allows for the automatic recognition of objects and the retrieval of relevant information through radio frequency signals. An RFID system typically consists of three main components: application software, RFID tags, and a reader [1]. Compared to low-frequency RFID systems, ultra-high frequency (UHF) RFID systems operating in the 860–960 MHz range offer advantages such as longer reading distances and faster data transfer speeds, making them a key area of development in RFID technology worldwide [2]. The design of the RFID reader plays a critical role in the overall system, with various design approaches available. Among these, Field-Programmable Gate Arrays (FPGAs) are widely used due to their ease of development, static reprogramming capabilities, and support for dynamic online programming, making them one of the most popular programmable ASICs today [3]. Many companies producing RFID products use their own proprietary standards, but several international standards exist, including ISO/IEC 11784, ISO/IEC 14443, ISO/IEC 15693, and ISO/IEC 18000. Among these, ISO/IEC 14443, ISO/IEC 15693, and ISO/IEC 18000 are the most commonly adopted [4]. This paper presents the design of an RFID reader operating at 915 MHz based on the ISO/IEC 18000-6 Type B protocol.
The hardware design of the card reader includes three main modules: the FPGA digital signal processing module, the MCU and human-machine interface module, and the RF transceiver module. A block diagram of the system is shown in Figure 1. The FPGA module handles baseband data encoding and decoding according to the ISO/IEC 18000-6 Type B standard. The MCU and human-machine interface module manage user interactions, such as command input and data display. The RF transceiver module processes the UHF signals from the front end.
**1.1 FPGA Digital Signal Processing Module**
The FPGA digital signal processing module includes a clock divider, FIFO buffer, Manchester encoder, CRC generator, FM0 decoder, serial-to-parallel converter, and a frame controller. Its block diagram is illustrated in Figure 2. The internal workflow is as follows:
- **Transmitting Part**: Data received from the MCU via an 8-bit parallel interface is stored in the FIFO. It is then converted to serial format, followed by CRC generation and Manchester encoding according to the protocol. The encoded data is sent to the RF transceiver after being framed.
- **Receiving Part**: The RF transceiver sends a baseband signal to the FPGA. The shift register detects the frame header, triggering FM0 decoding. Decoded data is converted back to parallel format, stored in FIFO, and checked using CRC. If the CRC check passes, the data is transferred to the MCU; otherwise, it is cleared and an error is reported.
**1.2 MCU and Human-Machine Interface Module**
This module is built around the C8051F020 microcontroller, which connects to peripherals such as an LCD, PS/2 keyboard, UART, and JTAG interface. The block diagram is shown in Figure 3. Key functions include coordinating the entire system, initializing the FPGA, sending commands to the FPGA, processing received data, implementing anti-collision algorithms, driving the LCD, expanding a keyboard for input, controlling the TR1000 chip, managing transmission power, and storing data in EEPROM.
**1.3 RF Transceiver Module**
The RF transceiver module can be implemented using either discrete components or a pre-built module. Given the complexity and time required for discrete component designs, this system uses a commercial RF transceiver module. The TR1000 chip from RFM is used, supporting both OOK and ASK modulation, and is ideal for short-range wireless applications due to its stability, compact size, and low power consumption [6].
**2. Software System Design of the Card Reader**
The software design follows a modular and structured approach, with the FPGA configured by the MCU during initialization. C language was chosen for its readability and portability, suitable for the C8051F020 microcontroller. The software is divided into three parts: the card reader program, the anti-collision algorithm, and the serial communication module.
**2.1 Read and Write Card Operating Procedures**
The card reader/writer program implements baseband signal encoding and decoding based on the ISO/IEC 18000-6 Type B protocol. The flowchart is shown in Figure 4. The process begins with system initialization, followed by waiting for a command from the host or keyboard. Depending on the command type, the system either enters an anti-collision routine or directly performs read/write operations. Upon successful operation, the result is returned to the host and displayed on the LCD; if there is an error, an appropriate message is shown.
Ethernet switch,Desktop switch,Gigabit Switch,Industrial Switch,TP link switch
Dongguan Jinglin Communication Technology Co., Ltd. , https://www.jlpcba.com